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S/H
Sample and Hold. See sample and hold.
Sacrificial etchback
the practice of cleaning a silicon wafer surface by oxidizing the surface and completely removing the oxide layer by etching and thereby removing surface contaminants.
SACVD
Selected Area Chemical Vapor Deposition. See deposition.
Safe
free of conditions that can cause occupational illness, injury, or death to personnel, damage to or loss of equipment or property, or damage to the environment.
Safe voltage
see National Electric Code (NEC) safe voltage.
Safety sign
see sign.
Sagittal focal surface
in the measurement of photolithographic instruments, the focal surface determined by examining only sagittal lines. See sagittal lines.
Sagittal lines
in the measurement of photolithographic instruments, an evaluative line pattern in which the lines lie along a radius to the optical axis.
Salicide
a self-aligned silicide; a silicon or polysilicon reaction with a metal to form a new compound self-aligned to the desired device component structure, such as the gate, source, and drain regions.
SAM
(1) Served Available Market. That segment of the marketplace that is actually addressed by the human and capital resources of an enterprise. (2) Statistical Analysis and Modeling Menu. A modeling system within FASTRACK that allows geometry-dependent analog simulations to model a large number of possible process variations, thus predicting the range of behaviors of the chip across wafer runs. See FASTRACK.
Sample and hold (S/H)
A system or IC in which a sample of an analog input signal is frozen in time and held while it is converted to a digital representation or otherwise processed.
Sample angle
in electron spectroscopy for chemical analysis, the angle of the surface with respect to a horizontal axis, which is defined as zero.
Sample flow rate
in particle contribution testing, the volumetric flow rate drawn by the counter for particle detection. The counter may draw higher flow for other purposes (for example, sheath gas).
Sample tilt angle
in scanning electron microscopy, the angle that the sample plane makes with a line normal to the incoming electron beam.
Sample volume flow
the actual amount of liquid being monitored in an optical particle counter, measured in units of liters or milliliters per minute.
Sampling distance
the lateral distance between areas to be measured for characterizing a surface.
Sampling numbe
the number of measurements to be made over a given surface.
Sampling time
in particle contribution testing, the time increment over which counts are recorded. .
Sapphire
in silicon on sapphire technology, a single-crystal aluminum oxide substrate having a definite orientation that allows epitaxial deposition. Also see epitaxy and epitaxial layer.
SAR
Successive Approximation Register. An A/D conversion method where the input voltage is compared to the output of a sequentially programmed D/A converter. First, the most significant bit (MSB) of the D/A is turned on and compared to the analog input. If the input is greater than the D/A output, the MSB is left on; otherwise it is turned off. This process is then repeated for all other bits in decreasing order until the least significant bit (LSB) is reached.
Saucer pits
see shallow etch pits.
Saw exit chip
in gallium arsenide technology, an edge fragment on a wafer broken off at the point at which the saw completed its cut of the wafer. A saw exit chip is typically straight or arc shaped, not irregular, and sometimes can be confused with the orientation flats. Contrast saw exit mark.
Saw exit mark
in silicon technology, a ragged edge at the periphery of a wafer consisting of numerous adjacent small adjoining edge chips resulting from saw blade exit. Also see saw marks, saw exit chip.
Saw marks
on a wafer, surface irregularities in the form of a series of alternating ridges and depressions in arcs, the radii of which are the same as those of the saw blade used for slicing. Also see saw exit mark.
Saw-blade defect
1: on semiconductor wafers, a roughened area visible after polishing with a pattern characteristic of the saw blade travel. Also see saw marks. 2: a depression in the wafer surface made by the blade, which may not be visible before polishing.
Saw-kerf
see scribe line.
Scaling
the proportional adjustment of the dimensions of an electronic device while maintaining the electrical properties of the device; results in a device either larger or smaller than the unscaled device.
Scaling laws
the set of rules describing how dimension-reduction in integrated circuits interrelate to each other and to the electrical behavior of the resulting devices. Scaling laws are used to predict the impact of size reduction on minimum power supply voltage and on device speed and power, as well as on the geometry of the structures.
Scan
1 n : in scanning tunneling microscopy, movement of the microscope tip relative to sample surface, continuously in one direction. Contrast raster. 2 v : to move the microscope tip continuously in one direction.
SCAN
Switched Capacitor ANalysis. A simulator available in FASTRACK that simulates a switched capacitor design. See FASTRACK.
Scan area
in scanning tunneling microscopy, area defined by successive, side-by-side scan lengths.
Scan direction
in scanning tunneling microscopy, the direction in which the tip or sample is continuously scanned, orthogonal to the Y-direction, in the sample plane. Also called X-direction. Also see scan.
Scan length
in scanning tunneling microscopy, the distance from start to end of a single scan. Also called scan width.
Scan path
a linkage of registers in an integrated circuit with associated control mechanisms that enables the registers to be operated as a shift register in addition to their normal mode of operation. This permits the registers to be controlled and observed during test mode, greatly enhancing testability.
Scan rate
in scanning tunneling microscopy and atomic force microscopy, the speed at which the tip or cantilever moves relative to the surface.
Scan width
see scan length.
Scanning Electron Microscope (SEM)
a device that displays an electronically scanned image of a die or wafer for examination on a screen or for transfer onto photographic film; displays a higher magnification than an optical microscope.
Scanning Tunneling Microscope (STM)
an instrument for producing surface images with atomic scale lateral resolution, in which a fine probe tip is raster scanned over the surface and the resulting tunneling current is monitored.
Scattering
the diffraction of light by particles or the reflection of light by particles or surfaces.
Scatterometer
an instrument used to study the nature of scattered light and determine information about a wafer's surface (for example, film thickness, refractive index, and surface contamination).
SCD
Source Control Drawing. A specification for a military semiconductor device that is specific to a program, a vendor, or a customer. Compare SMD.
Scenario
in communications and control of semiconductor manufacturing equipment, a group of SECS-II messages arranged in a sequence to perform a capability. Other information may also be included in a scenario for clarity.
Scheduled downtime
the total time during which equipment is not available to perform its intended function because of planned downtime events. Also see scheduled downtime state and equipment states.
Scheduled downtime state
one of the six equipment states, or conditions; a period during which equipment is not available to perform its intended function because of planned downtime events.
Schematic capture
The capture of circuit design by graphical means. The symbols representing functional blocks or individual circuit elements are placed on a graphical design workstation and interconnected by graphical representations of wires, pins, etc.
Schottky barrier diodes
a semiconductor diode that is formed by contact between a semiconductor layer and a metal coating; it has a nonlinear rectifying characteristic. Hot carriers are emitted from the metal coating that is the diode base; since majority carriers predominate, there is essentially no injection or storage of minority carriers to limit switching speeds. Also known as a hot-carrier diode.
SCOE
see SEMATECH Center of Excellence.
Scoring
in plastic molding preforms, marks, grooves, scratches, or notches with definite length, width, and depth physical characteristics.
SCR
Silicon Controlled Rectifier. A type of thyristor that is designed for forward bias, undirectional power switching and control. See thyristor.
Scrape
in cofired ceramic packages, the irregular removal of a deposited layer or surface layer from a base material by a shearing action from another surface, such that the base material is exposed over an extended area.
Scratch
on semiconductor wafers, a shallow groove or cut below the established plane of the surface, with a length to width ratio greater than 5:1. Also see macroscratch and microscratch.
Screening test
a test or combination of tests intended to remove unsatisfactory items or those items likely to exhibit early failures. (Copyright 1993 IEEE. All rights reserved.)
Scribe and break
The procedure used to separate a processed wafer into individual ICs. Narrow channels between individual ICs are mechanically weakened by scratching with a diamond tip (scribe), sawing with a diamond blade, or burning with a laser. The wafer is mechanically stressed and broken apart along the channels (called scribe lines), thereby separating the individual ICs (dice).
Scribe line
a space on a wafer between die. The space must be large enough to allow separation of the die by cutting or breaking, without damage to the die. Also called kerf, saw-kerf, and street.
Scuff
in flat panel display substrates, the marring of the glass substrate surface, leaving a milky white, grayish, or matte appearance and having appreciable width. Contrast with scratch.
Scum
resist residue located in a window or along the foot of patterned geometry.
Scumming
residual resist located in areas that should have been cleaned in the develop operation.
SDS
see sodium dodecyl sulfate.
Seal area
on a semiconductor package, the area designated for sealing a cover or lid to a cofired ceramic package, or a cap to a cerdip or cerpack base. In the case of a cofired package, the seal area may be either bare ceramic for glass sealing or a metallized area for solder sealing.
Seal cap
an end closure or plug used to block the open end of a tube or fitting to allow a test specimen to be pressurized with air.
Seal ring
in metal lid/preform assembly, the area designated for attaching the lid to the package by welding or soldering techniques.
Sealing
the joining of the package case header (chip carrier base or substrate) with the cover or lid into one sealed unit.
Seat
a part of a valve body in which the poppet or diaphragm assembly rests to control media flow.
Seating plane
in plug-in type devices, such as dual inline packages (sidebrazed or cerdip) or pin grid arrays, the plane formed by the three lowest shoulders on the leads or pins as measured from the bottom of the package. The seating plane holds the package off the circuit board to which it is mounted. This gap allows solder flux and residues to be cleaned after soldering the leads and, in some cases, allows for sufficient cooling air flow around the device. A prescribed force is used to hold the device in the mounting holes when the seating plane is to be measured. Also see standoff.
Secondary attribute
see primary attribute (secondary attribute).
Secondary containment
1: a safeguarding method used to prevent unplanned releases of toxic or hazardous compounds into uncontrolled work areas. 2: level of containment that is external to and separate from primary containment. Secondary containment is a method of safeguarding used to prevent unauthorized releases of toxic or hazardous gases into uncontrolled work areas. Secondary containment means those methods or facilities in addition to the primary containment system.
Secondary flat
a flat of length shorter than the primary orientation flat, whose position with respect to the primary orientation flat identifies the type and orientation of the wafer. DISCUSSION-In some cases, one or more nonstandard "secondary" flats are specified to identify other attributes of the wafer. Also called minor flat.
Secondary message
the second message of a transaction; an even-numbered message, which has bit 1 of the lower message ID set to 0. Contrast primary message.
SECS message service (SMS)
in communications and control of semiconductor manufacturing equipment, a SEMI standard (SEMI E13) that provides an alternative to SECS-I to be used when sending SECS-II formatted messages over a network.
SECS message subset
the set of SECS-II messages required to define the scenarios. This selected group is smaller in number than the current SEMI SECS-II.
Seebeck emf
see thermal emf.
Seed
in flat panel display substrates, a gaseous inclusion less than 0.5 mm long.
Segregation of gases
the National Fire Codes use the terms, "separated," "segregated," and "isolated" when referring to storage of hazardous materials. Segregated storage is generally defined by National Fire Protection Association (NFPA) Standards as "stored in the same room, but physically separated by space or barrier from incompatible materials."
Selectivity
An important parameter for an etcher. Selectivity refers to the ability of an etch process to only etch the layer which is to be patterned and not attack the layer underneath. A high selectivity is a good thing.
Self-checking bar code
in the bar code marking of silicon wafers, a bar code that uses a checking algorithm that can be applied against each character, so substitution errors can only occur if two or more independent printing defects appear within a single character.
Self-clocking
in the bar code marking of silicon wafers, a bar code in which the number of modules, bars, and spaces is the same in each character.
Self-consistent top-down design
a design methodology that starts at the conceptual or abstraction level with a set of behavioral descriptions of the final product. All of the design elements and constraints are supported by accurate models and carried through all levels of design hierarchy. Changes and/or corrections made to the design at any level of implementation will propagate, both upward and downward, through all the levels of the design hierarchy. Constraints such as manufacturability, reliability, or power are applied at the highest possible level. Also called hierarchical design methodology.
Self-contained regulator
a regulator that contains a mechanical spring that, when compressed by rotation of a control knob, imposes a force proportional to the desired outlet-gas pressure. The spring area is separated from the media by a static-sealed diaphragm, a dynamically sealed piston, or a bellows. Also see regulator.
Self-doping
see autodoping.
SEM
see scanning electron microscope.
SEMASPEC
a SEMATECH specification, method, rule, guideline, or description established and controlled by SEMATECH.
SEMATECH
SEmiconductor MAnufacturing TECHnology research consortium. A consortium of 14 American semiconductor manufacturing firms dedicated to restoring America's manufacturing leadership in semiconductors. Located in Austin, Texas, half of its annual funding is provided by its member companies and half by the federal government. Research results are transferred to member firms and to the government for both commercial and military applications.
SEMATECH Center of Excellence (SCOE)
a SEMATECH-funded research center at one of several designated U.S. universities that conducts basic and applied research in science and technology areas that are beneficial to the semiconductor industry.
SEMI Equipment Communications Standard 1 (SECS-I)
1: a SEMI Equipment Communications Standard (SEMI E4) that addresses the mechanism for conveying information over an electrically controllable medium such as wire, fiber-optic cable, or electromagnetic transmission. 2: a standard that specifies a method for a message transfer protocol with electrical signal levels based on EIA RS232-C.
SEMI Equipment Communications Standard 2 (SECS-II)
1: a SEMI Equipment Communications Standard (SEMI E5) that addresses how information should be structured for conveyance; provides syntax and semantics. 2: a standard that specifies a group of messages and the respective syntax and semantics for those messages relating to semiconductor manufacturing equipment control.
Semiconductor
an element that has an electrical resistivity in the range between conductors (such as aluminum) and insulators (such as silicon dioxide). Integrated circuits are typically fabricated in semiconductor materials such as silicon, germanium, or gallium arsenide.
Semiconductor device
An electronic device whose essential characteristics are governed by the flow of charge carriers within a semiconductor.
Semiconductor Equipment and Materials International, Inc. (SEMI)
an international trade organization with membership from companies that supply equipment, materials, and services used in the semiconductor manufacturing industry.
Semiconductor Equipment Technology Center (SETEC)
a national equipment design center at Sandia National Laboratories, established as a cooperative effort between SEMATECH and Sandia.
Semiconductor Industry Association (SIA)
the U.S. trade association of the semiconductor industry.
Semiconductor Research Corporation (SRC)
a corporation funded by the semiconductor industry to manage university research for its members. The SRC manages SEMATECH's university research program (SCOEs), since SEMATECH is an SRC member.
Semiconductor Safety Association (SSA)
an independent organization of safety professionals from semiconductor manufacturing companies.
Semicustom IC
An integrated circuit in which a portion of the circuit function is predefined and unalterable, while other portions can be configured to meet the designer's specific needs. Designers have the capability of designing application-specific circuits themselves, using either standard cell libraries or preconfigured arrays. Semicustom circuits can be analog, digital or mixed signal.
SemiSPIN
the Semiconductor Software Process Improvement Network, which is a leadership forum for the exchange of software improvement ideas and experience.
Send-ahead
a wafer exposed and developed to verify correct focus, critical dimensions (CDs), and alignment prior to committing the entire lot to exposure.
Sender
the end of the SECS-I link sending a message.
Sending port
in an automated material transfer, the port from which a transfer object is to be removed.
Sensitivity
in the leak rates of mass flow controllers, the smallest standard leak rate that an instrument, method, or system is capable of measuring under specified conditions. Also called minimum detectable leak rate.
Sensitize
the application of a compound or treatment to an object to increase the effect of a process or action on that object.
Sensitized photoplate
a photoplate coated with a radiation-sensitive substance.
Sensitizer
a material that on first exposure causes little or no reaction in man or test animals, but which on repeated exposure may cause a marked response not necessarily limited to the contact site.
Sensor
A component that provides an electrical signal in response to a specific physical or chemical stimulus such as heat, pressure, magnetic field, or a particular chemical vapor. Microsensors are the modern breed of sensor fabricated using processes similar to those for manufacturing ICs, or extensions of such processes. Integrated microsensors incorporate an integrated circuit on the same die as that used for the sensor element. Microsensors are expected to gain widespread acceptance in the 1990s for monitoring sophisticated automobile engine conditions.
Separation of gases
the National Fire Codes use the terms, "separated," "segregated," and "isolated" when referring to storage of hazardous materials. Separation as defined by National Fire Protection Association (NFPA) 49 is "storage within the same fire area, but separated by as much space as practical, or by intervening storage from compatible materials."
Service
in equipment communications, a function offered to a user by a provider. A service consists of a sequence of service primitives, each described by a list of parameters. A service excludes definition of message structure and protocol. Also called message service.
Service provider
in equipment communications, an application responsible for providing services to service users. NOTE-There may be one or more service users concurrently accessing a single service provider. It is the responsibility of the service provider to provide its services transparently to each service user.
Service user
in equipment communications, any application that uses the services.
Sessile cells
in determining surface associated biofilms of ultrapure water distribution systems, anchored cells attached to a surface.
Set point
in mass flow controller testing, the electrical input signal to the device that sets the desired value of the controlled flow.
Set point sensitivity
in testing regulator performance characteristics, the minimum pressure increment that can be repeatedly set on a regulator.
Set point stability
of a regulator, the variation in the outlet pressure that occurs under steady state conditions, within the regulator's control range.
Set point tolerance
in equipment exhaust systems, the range (±) of static pressure within which an exhaust enclosure will perform efficiently and effectively.
SETEC
see Semiconductor Equipment Technology Center.
Settling time
in mass flow controller testing, the interval between the set point step change and the period during which the actual flow remains within the specified band.
Setup and test
total time for which the equipment is not available to perform its intended task because of scheduled setup and test time, including daily checklists, etch rate tests, defect density tests, and oxygen cleans.
SEU
Single-Event Upset. Refers to the response of an IC to a single radiation event, such as an alpha particle or a cosmic ray, which can cause the temporary failure of an integrated circuit. Generally occurs in space applications and can be caused by such things as solar flares.
Shallow etch pits
on a wafer, etch pits that are small and shallow in depth under high magnification greater than 200X. Also called saucer pits. Also see haze.
Shape
for wafer surfaces, the deviation of a specified wafer surface relative to a specified reference plane when the wafer is in an unclamped condition, expressed as the range or total indicator reading (TIR) or as the maximum reference plane deviation (maximum RPD) within the specified fixed quality area (FQA).
Sharpness
the visual impression of distinctness in a photographic reproduction, such as the edge of an image; the subjective effect of the physical property acutance.
Sheet resistence (Rs)
of a semiconductor or thin metal film, the ratio of the potential gradient (electric field) parallel with the current to the product of the current density and thickness.
Shop floor control system
a production control system for control of product movement through the manufacturing line and for measurement of manufacturing performance.
Short
see bridge.
Short flow
A sequence of processing steps in a semiconductor fabrication facility that is a subset of the steps required to produce an integrated circuit product. A short flow processing sequence is usually an experiment to evaluate the performance of new or modified processes or equipments.
Short Term Exposure Limit (STEL)
in safety threshold limit values, the concentration to which workers can be exposed continuously for a short period of time without suffering from (a) irritation, (b) chronic or irreversible tissue damage, or (c) narcosis of sufficient degree to increase the likelihood of accidental injury, impair self-rescue, or materially reduce work efficiency, and provided that the daily threshold limit value, time-weighted average (TLV-TWA) is not exceeded.
Short wavelength cutoff
1: in characterizing surface roughness by noncontact optical profilometry, the smallest spatial wavelength at which the measurement device will measure 50% of the true amplitude of the sinusoidal surface feature. 2: in the roughness measurement of flat panel display substrate surfaces, a wavelength whose amplitude's attenuation ratio becomes 75% when the traced profile is passed through the low-pass wavelength filter that eliminates noise element.
Short-term capability
the process capability under controlled conditions over a brief period.
Short-wire pitch
the sum of conductor width and spacing between conductors for the short conductors on the first interconnect layer for transistor structures comprising subunits of the integrated circuit design.
Shot peening
a process of introducing damage on the back surface of a silicon wafer by striking the surface with a stream of quartz or other hard beads carried in air or water.
Should
a term indicating that a provision is recommended as good practice but is not a requirement of a specification.
Shoulder bend location
in plastic or cerdip and cerpack types of semiconductor packages, the width of the shoulders between leads on opposite sides of the package, measured from the outermost point of the outer shoulder bend radius.
Shoulder width intrusions
see protrusion.
Show stopper
a technical problem that, if not resolved, prevents further progress.
Shutdown
the time required to put the equipment in a safe condition when entering a nonscheduled state. It includes any procedures necessary to reach a safe condition. Shutdown is included only in nonscheduled time. Also see equipment states.
Shutoff
valve a valve designed for and capable of positive closure to prevent flow within a piping system. Typical shutoff valves include, but are not limited to, manually-actuated, power-actuated, or spring-actuated fail-safe shutoff valves. Usually excluded are self-actuated valves, such as check valves, pressure regulators, flow controllers, and other devices that are not intended to provide positive shutoff for safety isolation.
SI
abbreviation for the International System of Units (in its original French, le Système International d'Unités), which is a modernized metric system accepted as the standard by (among others) the American Society for Testing and Materials (ASTM), Semiconductor Equipment and Materials, International (SEMI), and the Institute of Electrical and Electronics Engineers (IEEE).
SIA
see Semiconductor Industry Association.
Side
1: in quartz and high-temperature wafer carriers, either wall of a wafer carrier that is perpendicular to the wafer plane. 2: in wafer transport equipment, the vertical planes not penetrated by any portion of the equipment. If a service connection such as a drain or an exhaust is brought out through a side, the boundary is defined by the nonservice portions of the equipment.
Side load
a result of bending a tube in a specified arc, consequently subjecting the tube fitting connection to a radial stress.
Side porosity
in plastic molding preforms, voids or holes with visible shape, size, and depth that are detected around a molding preform.
Sidebrazed
describes a ceramic dual inline package that has leads connected to the side of the package by brazing.
Side-to-side misalignment
among leads that are brazed to opposite sides of a package (for example, sidebrazed laminates), misalignment between the center lines of the leads on one side of the package to those of leads on the other side.
Sigma
a Greek letter used in statistical analysis to signify standard deviation.
Sign
a visual communication system that advises the observer of potential hazards that can cause accidental bodily injury, death, or property damage. A sign provides safety precautions, evasive actions, or other directions to eliminate or reduce the hazard to an acceptable level. Examples are safety sign, visual hazard alert, and alert.
Signal
Any electronic visual, audible, or other indication used to convey information. In semiconductors, an electrical quantity (typically voltage, current, or light level) corresponding to some physical quantity. Signals are coded in frequency or amplitude to separate them from unwanted noise. See noise.
Signal integrity
a condition in which signals can properly be resolved at their intended level in the presence of noise, interference, or crosstalk.
Signal processing
A broad class of electronic functions that enhance the representations of physical or electrical phenomena. Temperature, pressure, vibration, acceleration and flow are examples of physical properties that rely on signal processing enhancements. The detection and conversion of RF, X-ray or ultrasonic energy into images and sound is another form of signal processing. See analog signal processing and digital signal processing.
Signal word
see key word.
Signal-to-noise ratio
the ratio of signal voltage at a given threshold to the background noise voltage.
Silane (SiH4)
a colorless gas that is flammable and pyrophoric (capable of igniting spontaneously upon contact with air) and has a repulsive odor. Silane is used as a silicon source for the epitaxial deposition of single-crystal and polycrystalline silicon, for the low-temperature chemical vapor deposition of silicon dioxide, and for the chemical vapor deposition of silicon nitride films. It also is used for growth of amorphous silicon films.
Silicide
a silicon or polysilicon reaction with a metal to form a new compound.
Silicon (Si)
a brownish crystalline semimetal used to make the majority of semiconductor wafers.
Silicon compiler
a computer program capable of generating the design of a semiconductor circuit of the desired logic function from a description in a formal language.
Silicon dioxide (SiO2)
a passivation layer thermally grown or deposited on wafers. It is resistant to high temperatures. Oxygen or water vapor is used to grow silicon dioxide at temperatures above 900 degrees C. Silicon dioxide is used as a masking layer as well as an insulator. Also called quartz. Also see glass.
Silicon nitride (Si3N4) (abbr. SiN)
a passivation layer chemically deposited on a wafer at temperatures of between 600 degrees C and 900 degrees C to protect the wafer from contamination. Silicon nitride is also used as a masking layer and as an insulator.
Silicon on insulator (SOI)
a novel substrate for high-performance, low-power, and radiation-hard CMOS applications that offers process simplification, improved scalability, latch-up free and soft-error free operation, improved subthreshold slope, and drastic reduction in parasitic capacitances. At this writing, there are two manufacturing-oriented techniques to build SOI: SIMOX and bonded.
Silicon on sapphire (SOS) epitaxial wafer
a sapphire substrate combined with a silicon epitaxial layer deposited on it.
Silicon probes
electrical probes on an integrated circuit testing system that have been etched monolithically from a silicon wafer using a variation of integrated circuit processing technology.
silicon source gas
on a wafer, volatile or gaseous silicon compounds used as the epitaxial layer of material deposited. [SEMI M4-88] Also see epitaxy.
silicon tetrachloride (SiCl4)
a corrosive, colorless liquid that has a sharp, pungent odor. It hydrolyzes rapidly to form hydrogen chloride. Silicon tetrachloride is used for epitaxial deposition of single-crystal silicon and for high-temperature chemical vapor deposition of silicon dioxide. It also is used in the plasma etching process. Also called tetrachlorosilane. Also see dry plasma etch.
Silylation
the process of incorporating silicon into a film. This may be done from the liquid or gas phases.
SIM
See simulation, simulator.
SIMOX
Separation by IMplantation of OXygen. A process used to prepare SOI substrates. A very heavy dose of oxygen is implanted below the surface of a silicon wafer, after which the wafer is annealed at high temperature to convert the oxygen-implanted region into silicon dioxide. The growth of epitaxial silicon (on the surface, above the oxide layer) completes the SOI substrate.
SIMOX
a manufacturing-oriented technique to build silicon on insulator substrates. The process involves implanting oxygen and a high-temperature anneal to form the thin silicon film and the buried oxide. Abbreviation for separation by implantation of oxygen.
SIMS
Secondary Ion Mass Spectrometry.
Simulation'
representation of selected behavioral characteristics of one physical or abstract system by another system; for example, the representation of physical phenomena by means of operations performed by a computer system. Contrast analytical model.
Single crystal
a body of crystalline material that contains no large-angle boundaries or twin boundaries. Also called monocrystal. Contrast polycrystalline.
Single crystal silicon
an arrangement of atoms in a solid that has perfect periodicity (that is, no defects).
Single in-line package
See SIP.
Single Inline Package (SIP)
describes a package that is similar to a dual inline package but has a single line of leads on one side rather than on two sides. Also see dual inline package.
Single Layer Alumina Metallization (SLAM)
generally, a chip carrier package that does not have any cavities for die attach or wire bonding. Either such packages are sealed using cup shaped lids, or the die and wire bonds are coated with a resin.
Single segment
a single functional pattern formed by optical reduction from artwork. It is stepped and repeated to form an array.
Single-block message
a message sent in one block, which has up to 244 bytes of data. NOTE-In SECS-II, single-block messages must be sent as either a single block or a single packet. Contrast multiblock message.
Sinter
to react deposited aluminum with silicon to ensure good adhesion and to reduce radiation damage sometimes associated with aluminum deposition.
SIP
Single In-line Package. A package having a single row of external leads, usually mounted vertically with leads through the PC board, but can be surface mounted with leads bent in gull-wing fashion.
Site
on the front surface of a wafer, a rectangular area, the sides of which are parallel and perpendicular to the primary flat or to the notch bisector and the center of which falls within the fixed quality area (FQA).
Site array
a set of contiguous sites.
Site flatness
on a wafer, the total indicator reading (TIR) or the maximum focal-plane deviation (FPD) of the portion of a site that falls within the fixed quality area (FQA).
Skewness
see pitch error.
SLAM
see single layer alumina metallization.
Slave
the block-transfer designation for the host computer. NOTE-The equipment is designated as the master. This naming convention is based upon the assumption that the equipment is less able to store messages than the host.
Sled
a quartz structure with which quartz carriers that contain wafers are moved into, and out of, a furnace.
Sleek
in flat panel display substrates, a very shallow scratch on the polished surface that is sometimes invisible when the viewing angle is changed.
SLIC
Subscriber Line Interface Circuit. An integrated circuit widely used as an interface into telephone networks.
Slice
(verb) To cut into wafers. In semiconductor technology, to cut a crystalline ingot into thin pieces (wafers or slices) upon which the device patterns are subsequently formed. (noun) Another term for wafer. Also, a type of chip architecture that permits the cascading or stacking of devices to increase word bit size.
SLICE
Simulation Language with Integrated Circuit Emphasis. For the design of the analog portions of mixed signal circuits, the FASTRACK simulation environment consists of a BASIC-like language called SLICE with powerful expression scanning coupled with standard language constructs such as looping, conditionals and arrays, and the ability to call simulators from within the language.
Slice
see wafer.
Slip
in semiconductor wafers, a process of plastic deformation in which one part of a crystal undergoes a shear displacement relative to another in a manner that preserves the crystallinity of each part of the material. DISCUSSION-After preferential etching, slip lines are evidenced by a pattern of one more more parallel straight lines of dislocation etch pits that do not necessarily touch each other. On |111| surfaces, the group of lines are inclined at 60 degrees to each other; on |100| surfaces, they are inclined at 90 degrees to each other. Also see pit.
Slip line
a step occurring at the intersection of a slip plane with the surface.
Slip plane
the crystallographic plane on which the dislocations forming the slip move.
SLM
Single-Level Metal. The use of only one level of metal to form the contact interconnections in an IC. Compare DLM.
Slot
1: the area in which a wafer is situated within a wafer carrier. 2: a two-sided support for a standard wafer carrier when the carrier is oriented with its axis in a vertical attitude. 3: in cluster tools, a wafer location within a cassette module associated with the function of wafer I/O. Wafers enter or leave the intratool environment through slots. Generally, a slot, through its slot group, corresponds to a carrier location within a wafer carrier.
Slot group
in cluster tools, a logical collection of slots within a cassette module. A slot group, in general, corresponds to a carrier, containing the same number of slots as there are carrier locations in the corresponding carrier.
Slot spacing
in quartz and high-temperature wafer carriers, the distance from the center line of the first slot on one end to the center line of the slot on the other.] Also see slot.
Slug marks
in the production of stamped leadframes, random dents in the leadframe caused by foreign materials; for example, metal filings or imperfections in the rolling or stamping punches.
Slurry
A suspension of an abrasive grit in reactive chemicals that is used in chemical mechanical polishing. Different slurries must be used, depending on the metal or oxide layer that is to be polished.
Small Scale Integration (SSI)
the placement of between 2 and 10 active devices on a single die.
Smart discrete
See intelligent discrete.
SMD
(1) Standard Military Drawing. A military specification developed by the Defense Electronic Supply Center (DESC) for a semiconductor device. The specification applies to all manufacturers of the device. Compare SCD. (2) Surface Mount Device. See SMT.
SMIF
Standardized Mechanical Interface (see integrated standard mechanical interface).
SMS-context
a specification of the service elements of SECS message service (SMS) and semantics of communication to be used during the lifetime of an application association.
SMS-provider
that part of an application entity that conceptually provides the SECS message service (SMS) through the exchange of SMS protocol data units (PDUs).
SMS-user
that portion of the application process that conceptually invokes the SECS message service (SMS).
SMT
Surface-Mount Technology. The mounting of components on the surface of a printed circuit board, as contrasted with through-hole mounting where component leads extend through the board.
Smudge
dense local area of contamination usually caused by handling or fingerprints. Also see dirt.
Snowball
on a semiconductor wafer, a track with the appearance under magnification of a snowball rolled through snow.
SO
Small Outline (package). Similar to a miniature plastic flat pack, but with gull-wing lead forms primarily or wholly constructed for surface mounting. Typical lead spacing is 0.05 inch
Sodium Dodecyl Sulfate (SDS)
in determining surface associated biofilms of ultrapure water distribution systems, a common anionic detergent used as a biofilm release agent to obtain sample suspensions.
sodium hydroxide (NaOH)
1: a strong, caustic base in the form of white crystals. 2: a caustic material used as an etchant for polysilicon and silicon nitride.
Soft bake
heat treatment of resist-coated wafers (typically at 80-100 degrees C) to drive off solvents before the wafer is exposed.
Soft error
a memory-state error caused by a process that produces no permanent alteration of the physical condition of the device.
Software
The changeable programs and instructions for a computer, as opposed to the fixed hardware that implements the programs.
Software engineering
the systematic approach to the development, operation, maintenance, and retirement of software.
Software interlock
data exchange between two programs in order to verify that interlock conditions are met.
Software Process Improvement (SPI)
a structured approach to improving the quality of a corporation's software products through increasing their software development and maintenance capabilities along the lines defined by the capability maturity model developed by the Software Engineering Institute.
Software/hardware co-desig
see hardware/software co-design.
SOG
Spin On Glass, a type of dielectric used to try to planarize the die surface so that large step coverage issues are avoided. See dielectric and die.
SOI
see silicon on insulator.
SOIC
Small Outline Integrated Circuit. A miniature plastic flat pack designed for surface mount with gull-wing leads. Most versions have lead spacing of 0.05 inches. See SO.
Solder
1 v : to join two metals together using a metal alloy that melts, by industry convention, below 427 degrees C (800 degrees F). The two metals to be joined do not melt but may either show slight surface alloying with the solder or, in the case of plated components, the plating may become alloyed into the solder. Contrast braze. 2 n : a metal alloy with a melting point below 427 degrees C (800 degrees F). Tin/lead alloys are the most common alloys used for soldering. 80%/20% gold/tin alloy is often used to solder metal covers to metallized or metal seal rings on ceramic packages. Also see preform.
Solderability
The ability of a conductor to be wetted by hot solder and to form a strong low-resistance bond with the solder.
Solid state
Refers to the electronic properties of crystalline materials, generally semiconductor--as opposed to vacuum and gas-filled tubes that function by flow of electrons through space, or by flow through ionized gases. Solid state devices involve the interaction of light, heat, magnetic field, and electric currents in crystalline materials. Compared to earlier vacuum-tube devices, solid-state components are smaller, less expensive, more reliable, use less power, and generate less heat. The integration and miniaturization of solid-state devices has led the high-technology electronic evolution throughout the past 30 years.
Solvent
a substance capable of dissolving another substance, or substances, to form a solution. Examples are isopropyl alcohol, methyl alcohol, and xylene.
Solvent residue
1: a type of dirt found on wafer surfaces after solvent evaporation from the surface. The residue either is left by the solvent itself or is material that the solvent has removed from the surface and redeposited. 2: type of film found on wafer surfaces after solvent evaporation from the surface.
Soot
agglomerations of particles of carbon impregnated with "tar," formed in the incomplete combustion of carbonaceous material.
Sori
the difference between the maximum and minimum distances between a front-side reference plane and the surface of a wafer that is not chucked. The reference plane is chosen either as a means of minimizing the difference (sori) or as a least-squares fit to the front surface.
Sort yield
ratio of total number of good products (actual) to the potential number of good products.
SOS
see silicon on sapphire.
Source
one of the three major components of a CMOS transistor.
Source code
input to a compiler or assembler in a programming language usable by a machine-code translator.
Space
the more reflective element of a bar code, usually formed by the background between the bars.
Space-charge layer
see depletion layer.
Spacing in cassettes
or containers, the minimum spacing between cassette or container centroids.
Span
in the linearity of mass flow devices, the algebraic difference between the upper and lower range values.
Span effect
in the temperature specifications of mass flow controllers, the change in span due to a change in ambient temperature from one normal operating temperature to a second normal operating temperature. All other conditions must be held within the limits of reference operating conditions.
Spatial wavelength
in characterizing surface condition by noncontact optical profilometry, the corresponding lateral distance between two consecutive peaks for a surface that is a pure sinusoidal departure from the mean plane.
SPC
see statistical process control.
Special cause
a source of variation that is intermittent, unpredictable, or unstable and that affects only some of the individual values of the process output being studied. Also called assignable cause. Contrast common cause.
Specific equipment model
an equipment model for a particular type of equipment (for example, steppers, wire bonders, diffusion furnaces, etc.). Also see Generic Equipment Model.
Specific gravity
the ratio of the mass of a gas to the mass of an equal volume of air at a specified temperature. For liquids, it is the ratio of the mass of the liquid to the mass of an equal volume of water.
Specification
1: a detailed, precise description of a tool, material, process, method, or procedure. 2: a detailed definition of the logic used by an application or a program.
Specification limits (spec limits)
the requirements for judging the acceptability of a particular characteristic.
Specifications, military (for packaging)
The most commonly used military specs for hybrid circuit packaging are MIL-M-38510C, for general microelectronics, and MIL-STD-883A, for test methods.
Specified band
in mass flow controller testing, the region between ±2% of the final steady state value or ±0.5% of full scale, whichever is greater.
Spectral line
an image of a slit formed in the focal plane of a spectrograph or spectrometer and having a width approximately equal to that formed by monochromatic radiation.
Spectrometer
an instrument with an entrance slit, a dispersing device, and one or more exit slits, with which measurements are made at selected wavelengths within the spectral range, or by scanning over the range. The quantity detected is a function of radiant power
Spectrometry
a method based on designation of the wavelengths within a particular portion of a range of radiations or absorptions, for example, ultraviolet (UV), emission, or absorption spectrometry.
Spectroradiometer
an instrument for measuring the spectral concentration of radiant energy or radiant power.
Spectroscopy
an instrument for dispersing radiation into a spectrum for visual observation or emission or absorption.
Speed binning
the practice of sorting devices at final electrical test on the basis of performance in a switching speed test. The variations in performance result from process variances. The products are given product designations based on operating speed ranges.
SPICE
Simulation Program with Integrated Circuit Emphasis. Simulator used to model electrical circuits at the transistor level. This popular simulator was developed by UC Berkeley, and has been customized and enhanced by many. See SLICE.
SPIDER
a set of electrical test structures used during tool development to diagnose and measure the effects of damage on translator devices in a qualitative way. Abbreviation for SEMATECH process-induced damage effect revealer.
Spike
1: in an epitaxial wafer surface, a tall, thin dendrite or crystalline filament that often occurs at the center or recess. 2: an extreme structure that has a large ratio of height-to-base width and no apparent relation to epitaxial film thickness. Also see pyramid and mound.
Spin
an operation in which a metered amount of resist is applied to a wafer while it is spinning; the operation in which a substrate is rotated about an axis perpendicular to its surface while, or immediately after, a coating material is applied in liquid form to the substrate surface.
Spin coater
Also called a resist track or a track. A machine for applying photoresist uniformly to a wafer by spinning the wafer during or after pouring on the photoresist. Spin coaters are also used for developing and drying resist. In addition they can be used for coating wafers with other liquid films.
Spin coating
see spin.
Spin tool
Sometimes called a spin-rinse-dryer or SRD. This is a machine for etching or cleaning wafers in wet chemicals. It is constructed like a front loading laundry machine. A cassette holding its wafers is turned round and round as chemicals are dispensed over the wafers. Wafers are rinsed in pure (de-ionized) water, and dried by spinning at high speeds.
Spin webbing
the filamentary residue of excess resist spun from the substrate surface during spin coating that falls onto the substrate surface.
Spine-based AMHS layout
positions work-in-progress stockers at the beginning of the processing bays and has the automated material handling system (AMHS) track circulating within the main corridor of the fabrication area.
Spinner
see coater.
Spin-on glass
a solvent-based liquid that is applied to substrates using a spin-coat process; subsequently forms a thin, solid film exhibiting the properties of silicon dioxide after curing.
Spiral
1: on a wafer, a texture that circles around a central point in a widening spiral pattern. 2: on a semiconductor wafer, "orange peel" type surface texture with a spiral pattern.
Spiral flow
a measure of the molding characteristics of a thermosetting plastic molding compound for semiconductor devices. The shorter the spiral flow, measured in a specially designed test mold, the less likely that a production mold for semiconductor packages will completely fill with plastic when that material batch is used. As molding compounds age in storage, the spiral flow becomes shorter. Spiral flow is measured in inches. Also see ram follower.
Splatter
(jargon) a poor resist coat caused by the dripping of chemicals on a wafer during the spin operation.
Spool piece
in particle contribution testing, a null component consisting of a straight piece of electropolished tubing and appropriate fittings used in place of the test component to establish the baseline.
Spot
on semiconductor wafers, contaminant in the form of a random dried droplet of residue from detergents, solvents, or wax.
Spray tool
This is a machine for etching or cleaning wafers in wet chemicals. It works like a dishwasher in that chemicals are sprayed at the wafers. The cassettes holding the wafers are rotated while this is happening.
Spreading resistance
of a semiconductor, the ratio of the potential drop between a small-area conductive metal probe and a reference point on the semiconductor, to the current through the probe.
Sputter
an operation in which a target material, such as gold or aluminum, is bombarded with argon ions. The displaced molecules of the target material are then deposited on the wafer surface.
Sputter deposition
see sputter.
Sputter etch
the removal of film from a surface by ion bombardment.
Sputtering
A form of physical vapor deposition (PVD) often used for deposition of metal films. Sputtering involves knocking metal atoms off a disc of pure metal with charged, energetic, chemically inactive atoms called ions (from a plasma). The metal atoms will re-deposit onto the wafer to build up the desired metal film.
Squareness
1: in lithography, a measure of the degree to which an array conforms to an outline of a rectangle or square when four properly chosen corners of the array are compared to the outline. 2: in flat panel display substrates, the deviation of the outline of the substrate from a true square or rectangle.
SRAM
Static Random Access Memory. A read/write memory in which the data are latched and retained. SRAMs do not lose their contents as long as power is on. This memory does not need to be refreshed as does DRAM. Compare DRAM.
SRC
see Semiconductor Research Corporation.
SSA
see Semiconductor Safety Association.
SSI
see small scale integration.
SSQA
see Standardized Supplier Quality Assessment.
Stability
the absence of special causes of variation; the property of being in statistical control.
Stabistor
A switching diode designed for low voltage stabilizing applications. See diode.
Stable process
a process that is in statistical control.
Stacked capacitors
multilayer capacitors for high-density integrated circuits.
Stacking fault
in a crystal, a two-dimensional defect caused by a deviation from the normal stacking sequence of atoms.
Stack-level abatement
an end-of-pipe treatment for both corrosive and organic fab emissions that occurs before abatement by other means, such as water scrubbing or thermal destruction.
Stage micrometer
a calibrated scale for length measurement in conjunction with a microscope.
Stain
1: a solution applied to a cross-sectioned silicon device to reveal the location of various structures. 2: contaminant in the form of streaks that are chemical in nature and cannot be removed except through further lapping or polishing. Examples are "white" stains that are seen after chemical etching as white or brown streaks. [SEMI Materials, Vol. 3, Definitions for Semiconductor Materials] 3: a two-dimensional, contaminating foreign substance on a component surface. Also see contamination and foreign material. 4: in flat panel display substrates, any erosion of the surface; generally cloudy in appearance, it sometimes exhibits apparent color. [SEMI D9-94] 5: area contamination that is chemical in nature and cannot be removed except through further lapping or polishing.
Standard
a method, rule, or description subscribed to by the consensus of the appropriate industry and under control of the issuing organization for document revision.
Standard cell
a small group of transistors that implement a logic function; used as a building block to reduce the magnitude of a design task.
Standard coordinates
in the measurement of photolithographic instruments, a system of Cartesian coordinates with the Z axis along the optical axis of the system and with the X and Y axes in the flat plane perpendicular to the optical axis. The system user or vendor will specify the X and Y directions in this plane for any particular equipment studies.
Standard deviation
1: a measure of the spread of the process output or the spread of a sampling statistic from the process. The true standard deviation (represented by the Greek letter sigma) is estimated by calculating the difference of each individual observation from the average of the observations, squaring the differences, finding the sum of the squares, dividing by one less than the number of observations, and finding the square root of the result. 2: a measure of the variation among the members of a statistical sample. 3: in the pressure testing of fluorocarbon tube fittings, a measure of the variation among the members of a statistical sample.
Standard leak rate
1: in gas distribution systems, the quantity of test gas at 21.1 degrees C (70 degrees F) and 101.3 kPa (1 atm) flowing through a leak when the partial pressure of test gas on the high pressure side is 101.3 kPa, and the pressure on the low pressure side is below 2 Pa (2 S 10-4 torr). 2: in mass flow controllers, the quantity of helium at 25 degrees C and 101.3 kPa (760 torr) flowing through a leak when the high pressure side is at 101.32 kPa and the low pressure side is below 100 Pa (approximately 1 torr).
Standard logic
See logic.
Standard pressure
in the calibration of mass flow devices, the pressure, in pascals, specified as a reference for measurement and comparison. In the semiconductor industry, this pressure is defined as 101.32 kPa (760 torr).
Standard reference material
see artifact.
Standard solution
in the ionic contamination testing of semiconductor leadframes, a solution that contains a known concentration of the ion to be measured, and that is used to calibrate the chromatograph.
Standard temperature
1: defined as 21 degrees C ± 5 degrees C (70 degrees F ± 10 degrees F). 2: in the calibration of mass flow devices, the temperature, in degrees Celsius, specified as a reference for measurement and comparison. In the semiconductor industry, this temperature is defined as 0.0 degrees C.
Standard volumetric flow
in mass flow controllers, the calculated volumetric flow, at standard temperature and pressure, of gas in a closed fluid channel. Volume at standard temperature and pressure follows the ideal gas law, PV=nRT. Units of standard volumetric flow are commonly used to express mass flow in mass flow controllers and meters. Also see mass flow of gas, standard temperature, standard pressure, mass flow controller, and mass flow meter.
Standardized Supplier Quality Assessment (SSQA)
the de facto industry standard process for evaluating an organization's quality systems, business systems, organizational capability, and software quality.
Standardized test hardware
automated test equipment (ATE) components that perform with the same specifications, independent of the test system manufacturer.
Standardized test methodologies
techniques for testing integrated circuits that have been agreed on by the integrated circuit manufacturers.
Standardized test software
a test programming language that allows migration of test programs between automated test equipment (ATE) produced by different manufacturers.
Standardized tester metrics
techniques for measuring test system performance through specifications that have been agreed on by test system manufacturers and users.
Standby state
one of the six equipment states or conditions; a period other than nonscheduled time, in which the equipment is not operated, although it is in a condition to perform its intended function, and the chemicals and facilities are available.
Standby time
the total time (other than nonscheduled time) during which equipment is not operated, although it is in a condition to perform its intended function, and the chemicals and facilities are available. Also see standby state.
Standoff
1: the feature on the pins or leads which keeps the body of a dual inline or pin grid array semiconductor package from contacting the surface of a printed circuit board to which the leads are soldered. 2: the distance that the body of a semiconductor package is held off the circuit board to which the package leads are soldered. Also see seating plane. 3: standoff features, such as raised plastic areas; these may also be designed into the body of plastic packages.
Starburst
a poor resist coat caused by the application of a deficient amount of resist during the spin operation; results in a radial starburst pattern.
Start/stop character pattern
in the bar code marking of silicon wafers, a special bar code character that provides the scanner with start and stop reading instructions, as well as scanning direction. The start character is at the left end of a BC-412 symbol, and the stop character is at the right end of the symbol.
Start-up
the time required for equipment to achieve a condition in which it can perform its intended function when leaving a nonscheduled state. It includes pumpdown, warm-up, cool-down, stabilization periods, and initialization routines. Startup is included only in nonscheduled time.
State
in equipment communications, a static set of conditions and associated behavior. While all of its conditions are met, the state is current (active). Behavior within a given state includes the response to various stimuli.
State model
in computer-integrated manufacturing (CIM), the definition of the legal or stable conditions in which a system application or an object may exist, the transitions that can lead from state to state, and the events that cause these transitions to occur.
Static
A state in which a quantity exhibits no appreciable change over time.
Static current test
quiescent power supply current; a test that measures power supply leakage current in a complementary metal-oxide semiconductor (CMOS) integrated circuit to determine whether excess current flows, implying a fault.
Static port
in automated material movement, a port with no associated mechanisms capable of assisting or interfering with the transfer of an object. A transfer partner utilizing a static port for the transfer should always be passive. Contrast dynamic port.
Static Pressure (SP)
in equipment exhaust systems, the measure of differential pressure across the duct wall to the ambient pressure (inside the duct). The unit of measure is pascals (Pa, Newtons per square meter [N/m 2]) or inches of water.
Static RAM
See SRAM.
Static test
in particle contribution testing, a test performed on an as-received component in the fully open position. This test establishes particulate contribution by the valve to the counting system.
Station
a given collection of input and output devices, regardless of type. However, a large majority of stations in the manufacturing environment consist primarily of a CRT display and keyboard with other optional devices. An increasingly popular alternative is a station based on personal computer technology.
Statistical modeling
A circuit modeling technique available in FASTRACK in which the parameters that define the model are not fixed numbers but are correlated to a fundamental set of independent variables. This allows Monte-Carlo type analysis controlled by random numbers to cause the same distributions of performance in the simulator that occur in manufacturing. Statistical analysis routines can then be applied to the statistical simulation database to predict yields, performance to spec, and high-level performance distributions.
Statistical Process Control (SPC)
the use of statistical methods to analyze a process or its output to take appropriate actions to achieve and maintain a state of statistical control and continuously improve the process capability.
Steam atmosphere
the atmosphere in a heated, closed vessel containing water, with sufficient venting so that a temperature of 100 degrees +0, -5 degrees C is maintained at one (1) standard atmosphere. Steam atmosphere is used to accelerate surface aging characteristics during lead solderability testing.
Steam bath
exposure to flowing steam or to another source of heat at the temperature of flowing steam, at one atmosphere pressure.
Step
1: a single action in the performance of an operation, procedure, or process. 2: the transitions from lower levels of a wafer pattern to upper layers; the topography of a patterned wafer.
Step and repeat
an operation that, by the use of a stepper, repeats the image over the wafer as the stage makes small steps in the X and Y axes. The operation dimensionally positions multiples of the same or intermixed functional patterns on a given area of a photoplate or a film by repetitions, contact printing, or projection printing of a single original pattern of each type.
Step coverage
the ratio of thickness of film along the walls of a step to the thickness of the film at the bottom of a step. Good step coverage reduces electromigration and high-resistance pathways.
Step function transient response
in regulator performance testing, a plot of outlet pressure versus time when switching between two flow rates.
Step response time
in mass flow controller testing, the time between the set point step change and the moment the actual flow first enters the specified band.
Step stress test
a test that consists of several stress levels applied sequentially for periods of equal duration to a sample. During each period, a stated stress level is applied, and the stress level is increased from one step to the next. (Copyright 1993 IEEE. All rights reserved.)
Stepper
equipment used to transfer a reticle pattern onto a wafer.
STM
see scanning tunneling microscope.
Stockers
Automated storage units for wafers when they are not being processed.
Stoichiometric
describes a quantitative relationship, usually expressed as the ratio between two or more chemical substances undergoing a physical or chemical change; the point at which the chemical reaction ends or stabilizes.
Storage
Off-line information retention. See memory.
Storage temperature limits
in a mass flow controller, the temperature limits to which the device may be subjected in an unpowered condition. No permanent impairment will occur, but minor adjustments may be needed to restore performance to normal.
Streak
in the surface roughness measurement of flat panel display glass substrates, a defect whose appearance is a transparent line on the glass substrate surface. A streak can be caused by either a microsurface discontinuity or a cord, due to the heterogeneity of glass composition.
Stream
in SECS communication, a category of messages intended to support similar or related activities. NOTE-A specific message for a specific activity within a stream is called a function.
Street
see scribe line.
Stress marks
thin, radial lines that start in the center of a photoplate and extend outward. The lines are colored.
Stress test
exposure of components to extreme mechanical, temperature, humidity, and biased conditions.
Striation
1: a helical feature on the surface of a silicon wafer associated with local variations in impurity concentration. 2: a poor resist coat caused by separation of the chemical compounds of the resist.
Stripper
a chemical solvent used to remove resist film from wafers.
Stripping
an operation that completely removes a resist coating.
Stripping solution
a chemical mixture that will remove either processed or unprocessed resist from its substrate.
Stuck-at fault a fault
in a manufactured circuit causing an electrical node to be stuck at a logical value of 1 or a logic value of 0, independent of the input to the circuit.
Stylus method surface roughness measuring instrument
in the roughness measurement of flat panel display substrate surfaces, an instrument that traces on a section of a surface with a stylus, records irregularity on the surface in an enlarged form, and indicates irregularity amplitude as roughness parameters.
Subdiffused layer
see buried layer.
Sub-fab
the area located underneath the processing floor of the fab that contains support equipment (pumps, etc.) for processing tools.
Subject
to expose to or apply.
Submersion container
in fluid distribution systems, a transparent container filled with a low surface tension fluid at 23 ±3 degrees C, used for observing leakage. Also called submersion tank.
Submersion tank
see submersion container.
Submicrometer process
a sequence of steps that produces integrated circuits that have line widths (critical dimensions) of less than 1 micrometer.
Submittals
technical data about a specific product or system; a method that allows contractors to verify the design intent prior to purchase or construction.
Substrate
in the manufacture of semiconductors, a wafer that is the basis for subsequent processing operations in the fabrication of semiconductor devices or circuits.
Subsystem
an assembly of two or more components that is manufactured as a single entity. A subsystem must be combined with one or more additional components or subsystems to form a complete system.
Sulfur hexafluoride (SF6)
a colorless and odorless gas that has a low toxicity. Sulfur hexafluoride is used as a plasma etchant and as an etchant before chemical vapor deposition. Also see dry plasma etch.
Sulfuric acid (H2SO4)
a strong, poisonous, corrosive liquid that will mix with water and that will dissolve most metals. Sulfuric acid is used to clean wafers and to remove resist.
Superconductivity
The flow of electric current with negligible resistance in certain metals and alloys and over certain temperature ranges. In recent years, superconductivity has been achieved at temperatures as "high" as -140oC.
Supplier-dependent uptime
the percentage of time that the equipment is in a condition to perform its intended function during the period of operations time minus the sum of user maintenance delay, out-of-spec input downtime, and facilities related downtime. This calculation subtracts only user maintenance delay from the period, thereby taking into account supplier delays for parts and service. Also see equipment states.
Supply pressure effect
in determining regulator performance characteristics, the effect of an inlet pressure change on the outlet pressure of a regulator.
Support tool
a mechanical device that, although not a part of a piece of equipment, is required by it and becomes integral with it during the course of normal operation. Examples include wafer carriers, boats, and probe cards.
Surface
1: the boundary that separates an object from another object, substance, or space. 2: in electron spectroscopy for chemical analysis (ESCA), that volume from which the photoelectrons can escape.
Surface area index
in determining surface roughness by contact profilometry or scanning tunneling microscopy, the area of a best fit plane (or ideal surface) subtracted from the actual area calculated for the surface, divided by the ideal area, and multiplied by 1,000.
Surface chip
see peripheral chip.
Surface contamination
in flat panel display substrates, an area that is contaminated with organic or inorganic material.
Surface defects
1: in the manufacture of silicon on sapphire (SOS) epitaxial silicon wafers, mechanical imperfections, SiO2 residual dust, and other imperfections visible on the wafer surface. Some examples of surface defects are: dimples, pits, particulates, spots, scratches, smears, hillocks, and polycrystalline regions. [SEMI M4-88] 2: in flat panel display substrates, a marking, tearing or single line abrasion on the glass surface.
Surface imaging
multilayer resists on which the image to be transferred is focused onto a thin resist layer on the surface when developed. This thin layer serves as a mask to pattern a thick resist layer that is employed for forming the image on the wafer.
Surface micro defect
see crystal originated particle.
Surface profile
the contour of the surface in a plane perpendicular to the surface, unless some other angle is specified.
Surface protrusions or intrusions
in the manufacture of molded plastic packages, plastic excesses (such as bumps or blisters) or recesses (such as pits or voids) on any surface of the package.
Surface roughness
the finer irregularities of the surface texture, usually including those irregularities that result from the inherent action of the production process. Examples include traverse feed marks and other irregularities within the limits of the roughness sampling length.
Surface texture
the topographic deviations of a real surface from a reference surface. NOTE-Surface texture includes roughness, waviness, and lay.
Surgector
Solid-state devices formed by combining a thyristor and a Zener diode. It is designed to protect circuitry and equipment from damage due to transient surges, such as contact with power lines, lightning strikes, induced voltages due to magnetic or electric fields, and static discharges. Protection is provided by diverting the surge current through a low-impedance path around the vulnerable components. Ideal for data communication and telecommunication applications, but cannot be used in DC circuits where available current exceeds holding current. Harris surgectors are designed and produced in Mountaintop, Penn. Compare MOV.
Surrogate gas
in the calibration of mass flow devices, a gas intended to simulate the calibration characteristics of another gas.
Surround shape
a geometric configuration around the symbol, which can convey additional safety information.
Swab bud
in determining surface associated biofilm, the portion of a swab that makes contact with the sample, as distinct from the handle.
SWIM
a software system and data infrastructure that allows manufacturing modeling applications and CIM systems to be integrated in a common framework. A primary capability of SWIM is that it supports the transfer of common data between the referenced applications and systems. Through its task manager, SWIM also provides utilities that facilitate modeling analysis. Abbreviation for semiconductor workbench for integrated modeling.
Swirl
helical or concentric features that are visible to the unaided eye after preferential etch and appear to be discontinuous under 100X magnification.
Switch
As pertaining to semiconductors, an analog IC (typically CMOS) which, on command, either passes or blocks an electrical signal.
Switched capacitor
A technique commonly used in analog signal processing to create filtering and signal conditioning circuits.
Symbol
1: a graphic representation, either abstract or representational, of a hazardous situation and/or evasive actions to be taken to avoid harm. It may include a description of protective equipment to be used to eliminate or reduce the hazard to an acceptable level. Also see sign. 2: in the bar code marking of silicon wafers, a combination of characters, including start/stop characters, quiet zones, data characters and check characters, that are required by a particular symbology and that form a complete scannable entity.
Symbolic layout and compaction
An advanced way of producing custom quality layouts with reduced manual intervention. The symbols of transistors and interconnects are placed either automatically or manually. From there the compaction algorithms replace the symbolic representation with the correctly sized physical transistors and interconnects and compacts the layout to the limit of the algorithms and ground rules.
Symmetrical valve
a valve bilaterally identical with respect to its center line and having similar flow and pressure characteristics in either direction.
Symptom
a subjective indication of a disease or of a change in condition as perceived by the person.
Synthesis design
the automatic or semiautomatic creation or refinement of a design at a given level of abstraction; for example, local synthesis, layout synthesis, etc.
Synthesis for testability
the synthesis of logic from a higher level description incorporating considerations to ensure that the final design can readily be tested.
System
1: an integrated whole, composed of diverse, interacting, specialized structures and subfunctions. 2: an integrated structure of components and subsystems capable of performing, in aggregate, one or more specific functions.
System architecture
see architecture.
System bytes
a 4-byte field in a header; used for message identification.
System default
in communications and control of semiconductor manufacturing equipment, a state or states in the equipment behavioral model that are expected to be active at the end of system initialization, and the value or values that specified equipment variables are expected to contain at the end of system initialization.
System initialization
in communications and control of semiconductor manufacturing equipment, the process that an equipment performs at power-up, system activation, and/or system reset. This process is expected to prepare the equipment to operate properly and according to the equipment behavioral models.
Systemic effects (SYS)
describes effects on the metabolism and excretory functions.
System-level integration
(1) In semiconductor design and fabrication, packing more and more devices into an IC or designing multi-chip modules that are more and more complex. (2) In electronics in general, the progressive linking and testing of system components into a complete system. See multi-chip module.
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